RISC-V Design Verification Engineer (Mid-Staff)

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Job Overview

The RISC-V Design Verification Engineer at Andes Technology Corporation will play a crucial role in validating and ensuring the quality of RISC-V processor designs. This position entails collaborating with cross-functional teams to develop verification strategies, create robust test environments, and execute comprehensive test plans. The ideal candidate will be responsible for applying advanced verification methodologies to ensure the functionality, performance, and reliability of processor designs, ultimately contributing to the company’s commitment to excellence in semiconductor technology.

Job Responsibilities

• Develop and execute verification plans for RISC-V processor designs.
• Create and maintain test benches, simulation environments, and tools.
• Implement state-of-the-art verification methodologies including UVM, SystemVerilog, and formal verification techniques.
• Analyze verification results and provide clear documentation of findings.
• Collaborate closely with design engineers to identify and resolve issues related to design specifications.
• Conduct code reviews and mentor junior engineers within the verification team.
• Participate in cross-team integration efforts and contribute to system-level verification.

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
• 3-5 years of experience in hardware design verification, specifically in RISC-V or similar architectures.
• Proficiency in SystemVerilog, UVM, and other verification methodologies.
• Solid understanding of digital design principles and processor architecture.
• Experience with scripting languages such as Python or Perl for automation tasks.
• Strong analytical and problem-solving skills with attention to detail.
• Excellent communication skills, both written and verbal.

Technologies & Tools

The RISC-V Design Verification Engineer will utilize a variety of tools and technologies that are critical for efficient verification processes. These include simulation tools like ModelSim or Cadence Incisive, verification frameworks such as UVM, and scripting and automation capabilities using Python or Tcl. Familiarity with version control systems, particularly Git, will be essential for effective collaboration and source code management.

Ideal Candidates

The ideal candidates for this position will embody a blend of technical expertise and interpersonal skills that foster teamwork and innovation. They should be proactive, detail-oriented individuals who possess a deep passion for design verification and semiconductor technology. A strong commitment to continuous learning and staying updated on industry advancements will be essential. Furthermore, candidates should exhibit excellent problem-solving abilities and a collaborative spirit, essential for navigating the challenges of complex processor design verification.