Design Verification Engineer - System Verilog

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Job Overview

The Design Verification Engineer - System Verilog at Dice plays a pivotal role in ensuring that complex digital designs meet the highest standards of quality and performance. The successful candidate will be responsible for developing and executing verification plans, creating testbenches, and utilizing System Verilog to verify designs. The position requires a blend of technical expertise, attention to detail, and collaborative skills to work effectively within a cross-functional team. The engineer will also contribute to the continuous improvement of verification methodologies and drive innovative solutions to challenges in the design process.

Job Responsibilities

• Develop and execute comprehensive verification plans for digital designs.
• Create and maintain testbenches utilizing System Verilog.
• Work collaboratively with design engineers to understand design specifications and functionality.
• Identify and debug design issues using simulation and verification tools.
• Implement and improve verification methodologies and processes.
• Perform functional verification of complex digital systems.
• Generate verification reports and deliver results to stakeholders.
• Participate in design reviews and contribute to the overall quality assurance of projects.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
• 3+ years of experience in design verification of ASICs or FPGAs.
• Proficiency in System Verilog and modern verification methodologies such as UVM.
• Strong understanding of digital design principles and architecture.
• Experience with simulation tools (e.g., ModelSim, VCS, Questa).
• Familiarity with scripting languages such as Python or Tcl.
• Excellent problem-solving skills and attention to detail.
• Strong communication skills and the ability to work in a team environment.

Technologies & Tools

The Design Verification Engineer will utilize various technologies and tools to successfully fulfill their role. Key tools include System Verilog for writing testbenches, simulation software such as ModelSim and VCS for running simulations, and UVM for implementing verification methodologies. Additionally, proficiency in version control software and debugging tools is important for effective collaboration and troubleshooting.

Ideal Candidates

Ideal candidates for this position are detail-oriented professionals with a strong foundation in digital circuit design and verification. They should possess excellent analytical skills and be able to thrive in a fast-paced environment. A proactive mindset towards problem solving, combined with effective communication abilities, will enable them to work harmoniously within diverse teams. Moreover, the ideal candidate will demonstrate a passion for technology and a commitment to continuous learning and innovation in their verification processes.