FPGA Design/Verification Engineer - Secret Clearance

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Written by AI from the job title and company, not by Equiliem, so some details may not match this job. The employer's own page has the real description.

Overview

The FPGA Design/Verification Engineer at Equiliem is responsible for designing, developing, and verifying FPGA-based systems and solutions for various applications. The role entails collaborating with stakeholders to gather requirements and translate them into effective technical specifications, conducting simulations, and performing rigorous testing to ensure quality and reliability of the designs. The incumbent will also be required to maintain detailed documentation and assist in ensuring compliance with security protocols associated with Secret Clearance requirements.

Job Responsibilities

• Design, implement, and verify FPGA designs according to project specifications and requirements.
• Conduct simulations and performance evaluations to validate FPGA functionality.
• Collaborate with multi-disciplinary teams to gather design requirements and incorporate feedback.
• Develop and execute comprehensive test plans to ensure design integrity.
• Maintain and update design documentation, including specifications, test procedures, and validation reports.
• Identify and troubleshoot design issues, implementing effective solutions to improve performance.
• Ensure adherence to industry standards and best practices throughout the design life cycle.
• Stay updated on emerging technologies and practices in FPGA design and verification.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
• Minimum of 3 years of experience in FPGA design and verification.
• Proficiency in VHDL/Verilog hardware description languages.
• Experience with FPGA vendor tools such as Xilinx Vivado, Intel Quartus, or similar.
• Familiarity with simulation tools and methodologies for design verification.
• Strong problem-solving skills and a systematic approach to troubleshooting.
• Active Secret Clearance or eligibility to obtain Secret Clearance.

Technologies & Tools

The FPGA Design/Verification Engineer will utilize a variety of technologies and tools to achieve optimal design results. This includes utilizing industry-standard FPGA development environments such as Xilinx Vivado and Intel Quartus, as well as simulation and verification tools including ModelSim or similar. The engineer will also be expected to leverage scripting languages, such as Python or Tcl, for automation of testing processes and design validation.

Ideal Candidates

The ideal candidate for this position possesses a strong analytical mindset combined with excellent communication skills. They should be detail-oriented, demonstrating a commitment to accuracy and thoroughness in FPGA designs and verification practices. Additionally, the candidate should be proactive and adaptable, capable of working effectively under pressure and managing multiple tasks concurrently while maintaining the highest quality standards. A passion for innovation and continuous learning in the rapidly evolving field of FPGA technology is highly desirable.