FPGA Design/Verification Engineer with Active Secret Security Clearance

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Written by AI from the job title and company, not by GeoLogics Corporation, so some details may not match this job. The employer's own page has the real description.

Overview

The FPGA Design/Verification Engineer at GeoLogics Corporation will play a pivotal role in the development and validation of cutting-edge FPGA solutions. This individual will be responsible for designing, implementing, and testing FPGA architectures, ensuring they meet stringent performance, quality, and security standards. The position requires an active Secret Security Clearance and offers an opportunity to work on advanced military and aerospace projects in a collaborative environment focused on innovation and excellence.

Job Responsibilities

• Develop and design FPGA architectures for advanced electronic systems.
• Implement verification methodologies including simulation, static timing analysis, and hardware-in-the-loop testing.
• Collaborate with cross-functional teams to define and document system requirements.
• Perform design reviews and peer code reviews to ensure high-quality deliverables.
• Analyze and resolve hardware-software integration issues related to FPGAs.
• Maintain up-to-date documentation related to FPGA development and verification processes.
• Support field testing and troubleshooting of FPGA products in real-world applications.

Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field.
• Minimum of 3 years of experience in FPGA design and verification.
• Proficient in hardware description languages (HDLs) such as VHDL and Verilog.
• Experience with FPGA development tools such as Xilinx Vivado, Intel Quartus, or similar software.
• Strong understanding of digital design principles and practices.
• Previous experience with simulation tools and methodologies.
• Active Secret Security Clearance required.

Technologies & Tools

The FPGA Design/Verification Engineer will utilize a range of technologies and tools essential for the effective development and verification of FPGA solutions. Key tools include Xilinx Vivado, Intel Quartus for programming and design, ModelSim for simulation, and various version control and project management tools to facilitate collaboration. Knowledge of scripting languages such as Python or Tcl is advantageous for automating testing and verification processes.

Ideal Candidates

Ideal candidates for the FPGA Design/Verification Engineer position will possess a strong technical acumen combined with excellent problem-solving abilities. They should demonstrate effective communication skills for collaborating within a team environment and have a proactive approach to tackling challenges. A commitment to quality and a detail-oriented mindset are crucial, along with the capability to adapt in a dynamic work environment and stay updated on the latest technological advancements in the FPGA domain.