Full Time

Silicon Physical Design Engineer III

Actalent
$120,000 - $160,000* / year (about $58–$77 an hour)

Job Description

This job was posted over 30 days ago, so it has most likely closed. See newer jobs like it.

Written by AI from the job title and company, not by Actalent, so some details may not match this job. The employer's own page has the real description.

Overview

The Silicon Physical Design Engineer III at Actalent will be integral in the development of high-performance integrated circuits. This role encompasses the orchestration of the physical design process from floor planning to final GDSII. The engineer will leverage advanced technologies and methodologies to optimize designs for performance, power, and area, collaborating effectively with cross-functional teams to ensure that design objectives are met in a timely manner. Additionally, this position will involve mentoring junior engineers and contributing to the continuous improvement of design processes and tools.



Job Responsibilities

  • Lead the physical design process of complex ASICs, ensuring adherence to design requirements and specifications.
  • Perform floor planning, placement, and routing to achieve optimal performance and power targets.
  • Implement design rule checks (DRC), layout versus schematic (LVS), and other verification methodologies.
  • Work closely with design and verification teams to address any integration and timing issues in the design flow.
  • Utilize EDA tools to analyze and optimize designs, focusing on key performance metrics such as signal integrity and power consumption.
  • Develop macros and scripts to automate and enhance the design processes.
  • Provide technical leadership and mentorship to junior engineers, fostering a culture of learning and development.
  • Engage in design reviews and contribute to design documentation for project handoffs.


Qualifications

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
  • A minimum of 5 years of experience in physical design and/or ASIC layout.
  • Proficiency in industry-standard EDA tools such as Cadence, Synopsys, or Mentor Graphics.
  • Strong understanding of digital circuit design, chip architecture, and the physical design flow.
  • Hands-on experience with timing analysis, power analysis, and signal integrity analysis.
  • Familiarity with scripting languages such as Tcl, Python, or Perl, for automation and tools development.
  • Excellent problem-solving skills and the ability to work effectively in a team environment.


Technologies & Tools

The Silicon Physical Design Engineer III will utilize a range of sophisticated software and tools such as Cadence Encounter, Synopsys Design Compiler, and Mentor Graphics LineSim for layout and timing analysis. Additionally, scripting tools like Python and Tcl will be employed for process automation and design verification tasks, while various simulation and modeling software will be utilized to ensure design integrity and performance optimization throughout the design lifecycle.



Ideal Candidates

Ideal candidates for the Silicon Physical Design Engineer III position will exhibit a deep passion for technology and innovation within the semiconductor industry. They should possess strong analytical skills, along with meticulous attention to detail and an unwavering commitment to quality. Effective communication skills are essential, as the role requires collaboration with multiple teams. Additionally, resilience in solving complex challenges and a proactive attitude towards continuous learning and improvement will make a candidate an excellent fit for this dynamic position.

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