Silicon Physical Design Engineer III

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Position Overview

As a Silicon Physical Design Engineer III at Actalent, you will play a pivotal role in the development and implementation of innovative silicon solutions. Your responsibilities will encompass the full spectrum of physical design activities, from RTL synthesis through to final GDSII tape-out. You will collaborate with cross-functional teams to ensure design specifications are met and will leverage your expertise to optimize performance, power, and area of our semiconductor products. Your contributions will directly impact the efficiency and success of projects, driving advancements in technology within the organization.

Job Responsibilities

• Conduct physical design implementation from RTL to GDSII, ensuring adherence to design rules and specifications.
• Perform timing closure, power analysis, and signal integrity verification to enhance chip performance.
• Collaborate with digital design engineers to optimize the design for area, speed, and power consumption.
• Utilize Physical Verification tools to conduct DRC/LVS checks to ensure design integrity.
• Participate in design reviews, providing critical feedback and suggestions for improvement.
• Develop and maintain robust design methodologies and documentation.
• Guide junior engineers in best practices and problem-solving techniques in physical design processes.

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
• Minimum of 5 years of experience in physical design of ASICs or FPGAs, with a strong focus on timing and power optimization.
• Proficient in industry-standard physical design tools such as Cadence Innovus, Synopsys IC Compiler, and Mentor Graphics tools.
• Solid understanding of VLSI design principles, semiconductor physics, and fabrication processes.
• Hands-on experience with scripting languages (e.g., Tcl, Perl, Python) for automating design flows.
• Proven track record of successful tape-outs and ability to troubleshoot complex design issues.

Technologies & Tools

The Silicon Physical Design Engineer III will utilize a variety of advanced technologies and tools crucial for successful chip development. Key tools include Cadence Innovus for physical design implementation, Synopsys PrimeTime for timing analysis, and various EDA tools for design rule checking and layout verification. Familiarity with scripting languages, such as Python and Tcl, is essential for developing automation scripts to streamline design processes.

Ideal Candidates

The ideal candidate for the Silicon Physical Design Engineer III position is detail-oriented and possesses strong analytical skills. A collaborative mindset, coupled with a proactive approach to problem-solving, is essential for success in this role. The candidate should exhibit a passion for semiconductor technology and a continuous drive for learning and innovation. Excellent communication skills and the ability to mentor less experienced engineers will be critical in fostering teamwork and achieving project objectives.