Full Time

Silicon Physical Design Engineer III

Actalent
$120,000 - $160,000* / year (about $58–$77 an hour)

Job Description

This job was posted over 30 days ago, so it has most likely closed. See newer jobs like it.

Written by AI from the job title and company, not by Actalent, so some details may not match this job. The employer's own page has the real description.

Job Overview

The Silicon Physical Design Engineer III at Actalent will be responsible for the development and implementation of advanced physical design methodologies. This role requires expertise in timing closure, floor planning, place and route, and physical verification to ensure the successful design of high-performance, power-efficient integrated circuits. The engineer will collaborate with cross-functional teams to optimize design processes and overcome challenges that arise during the physical design flow, contributing to the creation of cutting-edge semiconductor products.



Job Responsibilities

  • Develop and optimize physical design flows for complex IC designs.
  • Perform floor planning, place and route, and timing analysis to achieve performance goals.
  • Collaborate with design and verification teams to ensure seamless integration of design specifications.
  • Engage in pre- and post-layout timing analysis and ensure timing closure.
  • Conduct physical verification checks, ensuring designs comply with foundry rules.
  • Utilize EDA tools for static timing analysis and DRC/LVS verification.
  • Identify and resolve design issues throughout the physical design process.
  • Document methodology and processes for design reuse and continuous improvement.


Qualifications

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
  • A minimum of 5 years of experience in silicon physical design.
  • Strong knowledge of CAD tools such as Synopsys, Cadence, or Mentor Graphics.
  • Experience with RTL synthesis, floor planning, place and route, and timing closure techniques.
  • Understanding of semiconductor design rules and physical verification methodologies.
  • Proficiency in scripting languages such as Perl, Python, or TCL.
  • Excellent analytical and problem-solving skills, along with strong attention to detail.


Technologies & Tools

This position involves utilizing a variety of state-of-the-art technologies and tools. The engineer will work extensively with electronic design automation (EDA) tools such as Synopsys Design Compiler, Cadence Innovus, and Mentor Graphics tools for layout and verification tasks. Knowledge of scripting languages, including Python and TCL, is essential for automating workflows and streamlining the design process. Familiarity with advanced node technologies and industry standards is also critical for successful performance in this role.



Ideal Candidates

Ideal candidates for the Silicon Physical Design Engineer III position will possess a strong technical background and a keen ability to navigate complex design challenges. They should demonstrate effective communication skills, allowing them to collaborate successfully with cross-functional teams and stakeholders. Adaptability and a commitment to continuous learning are important traits, as the semiconductor landscape evolves rapidly. A proactive approach to problem-solving, combined with a detail-oriented mindset, will enable successful candidates to meet the demands of high-performance design environments.

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